Referring to FIG. 1, which is a circuit diagram of a conventional serial data decoder. A receiver 1 at left side of the circuit diagram serves to receive and demodulate the signal, and then input a demodulated signal A (serial data) to the serial data decoder 2 that includes a buffer circuit 21; a charging circuit 22 and a decoding circuit 23.
The signal A, as shown in FIG. 2, is a serial data that serves to transmit the previously parallel data periodically in series. In each frame, many previously parallel data are transmitted in series. As shown at the top of FIG. 2, after the signal A of CH1, CH2, CH3, CH4. are transmitted in series, there will be a relative long period of idle time that is called “frame-ending section”, and then another frame of serial data transmission will be carried out again.
The signal A of CH1, CH2, CH3, CH4 . . . are inputted to the serial data decoder 2 and reshaped by the buffer circuit 21 and then transmitted to the charging circuit 22. The charging circuit 22 includes resistors, diode and capacitor C1. The signal at point B as shown in FIG. 2 shows the discharging of the capacitor C1. During transmission of the serial data CH1, CH2, CH3, CH4 . . . , the signal at point B keeps staying at a relative high level, while during the frame ending, the capacitor C1 will be completely discharged due to no serial data. After that, another frame of serial data transmission will be carried out again.
The signal at point B is transmitted to the decoding circuit 23 and is converted into the parallel data CH1, CH2, CH3, and CH4 by several D flip-flops 231, 232, 233 and 234. The waveforms of the outputs Q1, Q2, Q3 and Q4 of the D flip-flops 231, 232, 233 and 234 and the waveforms of the parallel data CH1, CH2, CH3, CH4 are shown in FIG. 2.
The defects of this conventional serial data decoder are that the capacitor C1 is too big, and the buffer circuit 21, the charging circuit 22 and the decoding circuit 23 are independent devices external to the receiver 1 and are not easy to be integrated with the receiver 1. Therefore, the circuit is not only big but also high cost.
The present invention has arisen to mitigate and/or obviate the afore-described disadvantages.